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ISL55002
Data Sheet July 27, 2006 FN7497.4
High Supply Voltage 200MHz Unity-Gain Stable Operational Amplifier
The ISL55002 is a high speed, low power, low cost monolithic operational amplifier. The ISL55002 is unity-gain stable and features a 300V/s slew rate and 200MHz bandwidth while requiring only 8.5mA of supply current per amplifier. The power supply operating range of the ISL55002 is from 15V down to 2.5V. For single-supply operation, the ISL55002 operates from 30V down to 5V. The ISL55002 also features an extremely wide output voltage swing of -12.75V/+13.4V with VS = 15V and RL = 1k. At a gain of +1, the ISL55002 has a -3dB bandwidth of 200MHz with a phase margin of 55. Because of its conventional voltage-feedback topology, the ISL55002 allow the use of reactive or non-linear elements in its feedback network. This versatility combined with low cost and 140mA of output-current drive makes the ISL55002 an ideal choice for price-sensitive applications requiring low power and high speed. The ISL55002 is available in an 8 Ld SO package and is specified for operation over the full -40C to +85C temperature range.
Features
* 200MHz -3dB bandwidth * Unity-gain stable * Low supply current: 8.5mA per amplifier * Wide supply range: 2.5V to 15V dual-supply and 5V to 30V single-supply * High slew rate: 300V/s * Fast settling: 75ns to 0.1% for a 10V step * Wide output voltage swing: -12.75V/+13.4V with VS = 15V, RL = 1k * Enhanced replacement for EL2244 * Pb-free plus anneal available (RoHS compliant)
Applications
* Video amplifiers * Single-supply amplifiers * Active filters/integrators * High speed sample-and-hold * High speed signal processing * ADC/DAC buffers * Pulse/RF amplifiers * Pin diode receivers
Ordering Information
PART NUMBER ISL55002IB ISL55002IB-T7 ISL55002IB-T13 ISL55002IBZ (See Note) ISL55002IBZ-T7 (See Note) TAPE & PART MARKING REEL 55002IB 55002IB 55002IB 55002IBZ 55002IBZ 7" 13" 7" 13" PACKAGE 8 Ld SO 8 Ld SO 8 Ld SO 8 Ld SO (Pb-Free) 8 Ld SO (Pb-Free) 8 Ld SO (Pb-Free) PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027
* Log amplifiers * Photo multiplier amplifiers * Difference amplifiers
Pinout
ISL55002 (8 LD SO) TOP VIEW
OUT 1 8 VS+ -+ +7 OUT2 6 IN25 IN2+
ISL55002IBZ-T13 55002IBZ (See Note)
MDP0027
IN1- 2 IN1+ 3 VS- 4
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL55002
Absolute Maximum Ratings (TA = 25C)
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V or 33V Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VS Differential Input Voltage (dVIN). . . . . . . . . . . . . . . . . . . . . . . . .10V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Temperature Range (TA). . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . +150C Storage Temperature (TST) . . . . . . . . . . . . . . . . . . .-65C to +150C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications
PARAMETER VOS TCVOS IB IOS TCIOS AVOL PSRR CMRR CMIR VOUT Input Offset Voltage
VS = 15V, AV = +1, RL = 1k, TA = 25C, unless otherwise specified. CONDITION VS = 15V -40C to +85C VS = 15V VS = 15V MIN TYP 1.2 17 0.6 0.2 0.2 VS = 15V, VOUT = 10V, RL = 1k VS = 5V to 15V VCM = 10V, VOUT = 0V VS = 15V VO+, RL = 1k VO-, RL = 1k VO+, RL = 150 VO-, RL = 150 13.25 -12.6 9.6 -8.3 80 VS = 15V, no load 2.0 AV = +1 AV = +1 Dual supply Single supply 2.25 4.5 12000 75 75 21000 100 90 13 13.4 -12.75 10.7 -9.4 140 8.5 3.2 1 50 15 30 9.25 3.5 2 MAX 5 UNIT mV V/C A A nA/C V/V dB dB V V V V V mA mA M pF m V V
DESCRIPTION
Average Offset Voltage Drift (Note 1) Input Bias Current Input Offset Current Average Offset Current Drift (Note 1) Open-loop Gain Power Supply Rejection Ratio Common-mode Rejection Ratio Common-mode Input Range Output Voltage Swing
ISC IS RIN CIN ROUT PSOR
Output Short Circuit Current Supply Current (per amplifier) Input Resistance Input Capacitance Output Resistance Power Supply Operating Range
NOTE: 1. Measured from TMIN to TMAX.
AC Electrical Specifications
PARAMETER BW
VS = 15V, AV = +1, RL = 1k, TA = 25C, unless otherwise specified. CONDITION VS = 15V, AV = +1 VS = 15V, AV = -1 VS = 15V, AV = +2 VS = 15V, AV = +5 MIN TYP 200 50 50 17 70 55 260 300 MAX UNIT MHz MHz MHz MHz MHz V/s
DESCRIPTION -3dB Bandwidth (VOUT = 0.4VPP)
GBWP PM SR
Gain Bandwidth Product Phase Margin Slew Rate (Note 1)
VS = 15V RL = 1k, CL = 5pF
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FN7497.4 July 27, 2006
ISL55002
AC Electrical Specifications
PARAMETER FPBW tS dG dP eN iN NOTES: 1. Slew rate is measured on rising edge. 2. For VS = 15V, VOUT = 10VPP, for VS = 5V, VOUT = 5VPP. Full-power bandwidth is based on slew rate measurement using FPBW = SR/(2 * VPEAK). 3. Video performance measured at VS = 15V, AV = +2 with two times normal video level across RL = 150. This corresponds to standard video levels across a back-terminated 75 load. For other values or RL, see curves. VS = 15V, AV = +1, RL = 1k, TA = 25C, unless otherwise specified. (Continued) CONDITION VS = 15V VS = 15V, 10V step NTSC/PAL NTSC/PAL 10kHz 10kHz MIN TYP 9.5 75 0.01 0.05 12 1.5 MAX UNIT MHz ns % nV/Hz pA/Hz
DESCRIPTION Full-power Bandwidth (Note 2) Settling to +0.1% (AV = +1) Differential Gain (Note 3) Differential Phase Input Noise Voltage Input Noise Current
Typical Performance Curves
FIGURE 1. OPEN-LOOP GAIN vs FREQUENCY
FIGURE 2. OPEN-LOOP PHASE vs FREQUENCY
FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS NONINVERTING GAIN SETTINGS
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS INVERTING GAIN SETTINGS
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FN7497.4 July 27, 2006
ISL55002 Typical Performance Curves
(Continued)
FIGURE 5. PHASE vs FREQUENCY FOR VARIOUS NONINVERTING GAIN SETTINGS
FIGURE 6. PHASE vs FREQUENCY FOR VARIOUS INVERTING GAIN SETTINGS
100 GAIN BANDWIDTH PRODUCT [MHz]
RL=500
350 AV=+2 RF=500 300 RL=500 CL=5pF 250
80 SLEW RATE (V/s)
POSITIVE SLEW RATE
60
NEGATIVE SLEW RATE
40
200
20
150
0 0 3 6 9 12 15 SUPPLY VOLTAGES (V)
100 0 3 6 9 12 15 SUPPLY VOLTAGES (V)
FIGURE 7. GAIN BANDWIDTH PRODUCT vs SUPPLY
FIGURE 8. SLEW RATE vs SUPPLY
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RLOAD (AV = +1)
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS RLOAD (AV = +2)
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FN7497.4 July 27, 2006
ISL55002 Typical Performance Curves
(Continued)
5 NORMALIZED GAIN (dB)
VS = 15V 4 AV = +2 RF = 500 3 R = 500 L 2 1 0 -1 -2 -3 -4 -5 100k 1M
CL= 68pF CL= 39pF
CL= 100pF CL= 22pF
CL= 39pF
10M FREQUENCY (Hz)
100M
1G
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CLOAD (AV = +1)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS CLOAD (AV = +2)
5 NORMALIZED GAIN (dB)
5 NORMALIZED GAIN (dB) VS = 15V 4 A = +2 V 3 RL = 500 CL = 5pF 2 1 0 -1 -2 -3 -4 -5 1M 10M 100M FREQUENCY (Hz) 1G 100k 1M RF=100 RF=250 RF=500 RF=1k 10M 100M
VS = 15V 4 AV = +1 3 RL = 500 CL = 5pF 2 1 0 -1 -2 -3 -4 -5 100k RF=100 RF=0
RF=500 RF=250
FREQUENCY (Hz)
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS RFEEDBACK (AV = +1)
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS RFEEDBACK (AV = +2)
4 3 NORMALIZED GAIN (dB) 2 1 0 -1 -2 -3 -4 -5 -6 100k 1M 10M FREQUENCY (Hz) 100M 1G CIN = 0pF CIN = 2.2pF VS = 15V RF = 500 RL = 500 CL = 5pF AV = +2 CIN = 10pF CIN = 6.8pF NORMALIZED GAIN (dB) CIN = 4.7pF
5 4 3 2 1 0 -1 -2 -3 -4
AV = +1 RF = 0 RL = 500 CL = 5pF
VS = 2.5V VS = 5V
VS = 10V VS = 15V
-5 100k
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS INVERTING INPUT CAPACITANCE (CIN)
FIGURE 16. GAIN vs FREQUENCY FOR VARIOUS SUPPLY SETTINGS
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FN7497.4 July 27, 2006
ISL55002 Typical Performance Curves
(Continued)
FIGURE 17. COMMON-MODE REJECTION RATIO (CMRR)
FIGURE 18. POWER SUPPLY REJECTION RATIO (PSRR)
-20 HARMONIC DISTORTION (dBc) VS=15V -30 AV=+1 RF=0 -40 RL=500 CL=5pF -50 VOUT=2VP-P -60 2ND HD -70 3RD HD -80 -90 -100 500K 1M 10M FREQUENCY (Hz) 40M THD
FIGURE 19. HARMONIC DISTORTION vs FREQUENCY (AV = +1)
FIGURE 20. HARMONIC DISTORTION vs OUTPUT VOLTAGE (AV = +2)
25 OUTPUT VOLTAGE SWING [Vp-p]
RL=500 CL=5pF
Av=+1
20 Av=+2 RF=500
15
10
5
0 0 3 6 9 12 15 SUPPLY VOLTAGES (V)
FIGURE 21. OUTPUT SWING vs FREQUENCY FOR VARIOUS GAIN SETTINGS
FIGURE 22. OUTPUT SWING vs SUPPLY VOLTAGE FOR VARIOUS GAIN SETTINGS
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FN7497.4 July 27, 2006
ISL55002 Typical Performance Curves
(Continued)
20% to 80% 80% to 20% 20% to 80% 80% to 20%
FIGURE 23. LARGE SIGNAL RISE AND FALL TIMES
FIGURE 24. SMALL SIGNAL RISE AND FALL TIMES
25 TOTAL SUPPLY CURRENT (mA) POWER DISSIPATION (W)
1.2 1 0.8
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
20
15
781mW 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) SO8 JA=160C/W
10 AV=+1 RF=0 RL=500 CL=5pF 0 3 6 9 12 15
5
0 SUPPLY VOLTAGES (V)
FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
1.8 1.6 POWER DISSIPATION (W) 1.4 1.2
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1 1.136W 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) SO8 JA=110C/W
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
7
FN7497.4 July 27, 2006
ISL55002 Product Description
The ISL55002 is a wide bandwidth, low power, and low offset voltage feedback operational amplifier. This device is internally compensated for closed loop gain of +1 or greater. Connected in voltage follower mode and driving a 500 load, the -3dB bandwidth is around a 200MHz. Driving a 150 load and a gain of 2, the bandwidth is about 90MHz while maintaining a 300V/s slew rate. The ISL55002 is designed to operate with supply voltage from +15V to -15V. That means for single supply application, the supply voltage is from 0V to 30V. For split supplies application, the supply voltage is from 15V. The amplifier has an input common-mode voltage range from 1.5V above the negative supply (VS- pin) to 1.5V below the positive supply (VS+ pin). If the input signal is outside the above specified range, it will cause the output signal to be distorted. The outputs of the ISL55002 can swing from -12.75V to +13.4V for VS = 15V. As the load resistance becomes lower, the output swing is lower. the gain slightly. If the gain setting is greater than 1, the gain resistor RG can then be chosen to make up for any gain loss which may be created by the additional series resistor at the output. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
Output Drive Capability
The ISL55002 does not have internal short circuit protection circuitry. It has a typical short circuit current of 140mA. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds 60mA. This limit is set by the design of the internal metal interconnect. Note that in transient applications, the part is robust. Short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. In video applications this would be a 75 resistor and will provide adequate short circuit protection to the device. Care should still be taken not to stress the device with a short at the output.
Choice of Feedback Resistor and Gain Bandwidth Product
For applications that require a gain of +1, no feedback resistor is required. Just short the output pin to the inverting input pin. For gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF can't be very big for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico Farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. For gain of +1, RF = 0 is optimum. For the gains other than +1, optimum response is obtained with RF with proper selection of RF and RG (see Figures15 and 16 for selection).
Power Dissipation
With the high output drive capability of the ISL55002, it is possible to exceed the 150C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. The maximum power dissipation allowed in a package is determined according to:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA
Video Performance
For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This is especially difficult when driving a standard video load of 150, because of the change in output current with DC level. The dG and dP of this device is about 0.01% and 0.05, while driving 150 at a gain of 2. Driving high impedance loads would give a similar or better dG and dP performance.
Where: * TJMAX = Maximum junction temperature * TAMAX = Maximum ambient temperature * JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or:
Driving Capacitive Loads and Cables
The ISL55002 can drive a 47pF load in parallel with 500 with less than 3dB of peaking at gain of +1 and as much as 100pF at a gain of +2 with under 3db of peaking. If less peaking is desired in applications, a small series resistor (usually between 5 to 50) can be placed in series with the output to eliminate most peaking. However, this will reduce
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FN7497.4 July 27, 2006
ISL55002
For sourcing:
n
PD MAX = V S x I SMAX +
i=1
( VS - VOUTi ) x ----------------R Li
n
V OUTi
For sinking:
PD MAX = V S x I SMAX +
capacitor in parallel with a 0.1F ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail.
( VOUTi - VS ) x ILOADi
i=1
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
Where: * VS = Supply voltage * ISMAX = Maximum quiescent supply current * VOUT = Maximum output voltage of the application * RLOAD = Load resistance tied to ground * ILOAD = Load current * N = number of amplifiers (max = 2) By setting the two PDMAX equations equal to each other, we can solve the output current and RLOAD to avoid the device overheat.
Application Circuits
Sallen Key Low Pass Filter
A common and easy to implement filter taking advantage of the wide bandwidth, low offset and low power demands of the ISL55002. A derivation of the transfer function is provided for convenience (See Figure 28).
Power Supply Bypassing Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7F tantalum
Sallen Key High Pass Filter
Again this useful filter benefits from the characteristics of the ISL55002. The transfer function is very similar to the low pass so only the results are presented (See Figure 29).
V2 5V C5 1nF C1 1nF R1 V1 1k R2 + 1k C2 1nF RB 1k RA 1k C5 1nF V3 5V V+ VVOUT R7 1k
K = 1+ Vo = K
RB RA
1 V1 R2C2s + 1 Vo V1 - Vi Vo - Vi 1 + K - V1 + =0 1 R1 R2 C1s K H(s) = R1C1R2C2s 2 + ((1 - K )R1C1 + R1C2 + R21C2)s + 1 1 H( jw ) = 2 1 - w R1C1R2C2 + jw ((1 - K )R1C1 + R1C2 + R2C2) Holp = K wo = Q= 1 R1C1R2C2 1 R1C1 R1C2 R2C2 (1 - K ) + + R2C2 R2C1 R1C1
Holp = K
FIGURE 28. SALLEN-KEY LOW PASS FILTER
1 RC 1 Q= 3 -K wo =
Equations simplify if we let all components be equal R=C
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FN7497.4 July 27, 2006
ISL55002
V2 5V C5 1nF C1 1nF R1 V1 1k R2 + 1k C2 1nF RB 1k RA 1k C5 1nF V3 5V V+ VVOUT R7 1k
Holp = K wo = Q= 1 R1C1R2C2 1 R1C1 R1C2 R2C2 + + (1 - K ) R2C2 R2C1 R1C1
Holp = wo = Q=
K 4 -K
Equations simplify if we let all components be equal R=C
2 RC
2 4 -K
FIGURE 29. SALLEN-KEY HIGH PASS FILTER
Differential Output Instrumentation Amplifier
The addition of a third amplifier to the conventional three amplifier instrumentation amplifier introduces the benefits of differential signal realization, specifically the advantage of using common-mode rejection to remove coupled noise and ground potential errors inherent in remote transmission. This configuration also provides enhanced bandwidth, wider output swing and faster slew rate than conventional three amplifier solutions with only the cost of an additional amplifier and few resistors.
e1 A1 + R2 R3 R3
e o3 = - ( 1 + 2R 2 R G ) ( e 1 - e 2 ) e o = - 2 ( 1 + 2R 2 R G ) ( e 1 - e 2 ) 2f C1, 2 BW = ----------------A Di
e o4 = ( 1 + 2R 2 R G ) ( e 1 - e 2 )
A Di = - 2 ( 1 + 2R 2 R G )
Strain Gauge
The strain gauge is an ideal application to take advantage of the moderate bandwidth and high accuracy of the ISL55002. The operation of the circuit is very straightforward. As the strain variable component resistor in the balanced bridge is subjected to increasing strain, its resistance changes, resulting in an imbalance in the bridge. A voltage variation from the referenced high accuracy source is generated and translated to the difference amplifier through the buffer stage. This voltage difference as a function of the strain is converted into an output voltage.
A3 + R3 R3 +
eo3
RG
R3
R3
REF eo
R2
A4 + R3 R3
eo4
A2 e2 +
FIGURE 30. DIFFERENTIAL OUTPUT AMPLIFIER
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FN7497.4 July 27, 2006
ISL55002
+V 2 5V C6 VARIABLE SUBJECT TO STRAIN V5 + 0V R15 1k 1k R16 1k 1k RF 1k C12 1nF + V4 - 5V R17 R18 1k + 1k V1nF
V+ VOUT RL (V1+V2+V3+V4) 1k
FIGURE 31. STRAIN GAUGE
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FN7497.4 July 27, 2006
ISL55002 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. L 2/01
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 12
FN7497.4 July 27, 2006


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